The SN74LS160N is a Synchronous Decade Counter (direct clear). that is, the output may be preset to either level. As presetting is synchronous, setting up a low level at the load input disables the counter and causes the outputs to agree with the setup data after the next clock pulse regardless of the levels of the enable inputs. Low- to-high transitions at the load input of this device should be avoided when the clock is low if the enable inputs are high at or before the transition. The clear function is asynchronous and a low level at the clear input sets all four of the flip-flop outputs. The carry look-ahead circuitry provides for cascading counters for n-bit synchronous applications without additional getting. Instrumental in accomplishing this function is two count-enable inputs and a ripple carry output. Both count-enable inputs (P and T) must be high to count, and input T is fed forward to enable the ripple carry output.
●Synchronous preset decimal counter (0-9 count)
●Fully compatible with TTL/DTL input logic level
●Low efficiency asynchronous clear 0 terminal
●Have Complementary output function
●With carry output flag RC, multi chip cascade extension can be realized.
●Package format: DIP16, SOP16
●Digital logic driver
●Industrial control application
●Other application areas
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